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Digital Channel Simulator Developed and Tested

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Digital Channel Simulator.

The Digital Channel Simulator (DCS) is a real-time test set developed in-house by the NASA Glenn Research Center at Lewis Field that simulates the characteristics of the modulator, demodulator, and transmission medium in a typical communications system to enable controlled laboratory testing of codec pairs. The DCS can support data rates up to 100 megasymbols per second (Msymbols/sec) with symbol sizes up to 10 bits and is compatible with both TTL (transistor transistor logic) and ECL (emitter coupled logic) interfaces. Because of its use of digital integrated circuits (IC’s), the DCS offers the user accurate and repeatable testing while maintaining a simple reconfiguration of the modulation scheme and noise characteristics. The PC-based graphical user interface (GUI) assures user friendly operation for configuring, controlling, and monitoring the DCS and system during tests.

In a typical communications system, the modulator places a symbol in constellation space and puts it on a carrier to be sent to the demodulator. Because of noise on the channel, the I and Q position in constellation space cannot be recovered exactly, and the received coordinates shift.

diagram from data source to encorder to channel simulator (modulator and demodulator) to decoder to data received

Typical communications system showing items simulated with DCS.

To mimic this process in the laboratory, the DCS uses a mapper to place the symbol in constellation space. It simulates the shift in coordinates by digitally adding "noise" to the I and Q values.

diagram from mapper to noise source to I and Q output

DCS functional block diagram.

The mapper and noise source are implemented in lookup tables. Modulation schemes and noise characteristics are set by the values loaded in these tables. The mapper also has a pass-through mode to facilitate modulator testing, allowing noise to be added to 8-bit I and Q values of modulated data without a second mapping.

To achieve high symbol rates, eight processing circuits are placed in parallel between an ECL demultiplexer and multiplexer.

diagram from demultiplexer to mappers to noise sources to multiplexer

DCS block diagram.

A graphical user interface was developed to calculate, load, and verify the values for the lookup tables. This interface can also be used to debug and verify proper operation of the channel simulator or to control an experiment.

diagram from mapper to graphical user interface to noise source and back to I and Q output

Connections between graphical user interface and DCS.

Operation of the DCS has been verified through three tests: a low-speed comprehensive system test, a high-speed (20 Msymbols/sec) test of the TTL interface, and a high-speed (100 Msymbols/sec) test of the ECL interface. The DCS is now ready for use by NASA and external customers.

Glenn contact: Thomas P. Bizon, (216) 433–8121, Thomas.P.Bizon@grc.nasa.gov

Author: Thomas P. Bizon

Headquarters program office: OSS

Programs/Projects: Space Communications


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Last updated April 24, 2000, by Nancy.L.Obryan@nasa.gov


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